From 32b4eb950bb267ad076929c3477c7a2b1de231ca Mon Sep 17 00:00:00 2001 From: vito <7718858+vitochl@user.noreply.gitee.com> Date: Thu, 13 Aug 2020 17:29:28 +0800 Subject: [PATCH 1/4] add driver --- bsp/imxrt/libraries/MIMXRT1050/SConscript | 3 + bsp/imxrt/libraries/drivers/SConscript | 3 + bsp/imxrt/libraries/drivers/drv_usdhc.c | 544 ++++++++++++++++++++++ bsp/imxrt/libraries/drivers/drv_usdhc.h | 27 ++ 4 files changed, 577 insertions(+) create mode 100644 bsp/imxrt/libraries/drivers/drv_usdhc.c create mode 100644 bsp/imxrt/libraries/drivers/drv_usdhc.h diff --git a/bsp/imxrt/libraries/MIMXRT1050/SConscript b/bsp/imxrt/libraries/MIMXRT1050/SConscript index a689cd8cbe..bdd85ae499 100644 --- a/bsp/imxrt/libraries/MIMXRT1050/SConscript +++ b/bsp/imxrt/libraries/MIMXRT1050/SConscript @@ -75,6 +75,9 @@ if GetDepend(['BSP_USING_DMA']): src += ['MIMXRT1052/drivers/fsl_edma.c'] src += ['MIMXRT1052/drivers/fsl_lpuart_edma.c'] src += ['MIMXRT1052/drivers/fsl_lpspi_edma.c'] + +if GetDepend('BSP_USING_SDMMC'): + src += ['MIMXRT1052/drivers/fsl_usdhc.c'] group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path) diff --git a/bsp/imxrt/libraries/drivers/SConscript b/bsp/imxrt/libraries/drivers/SConscript index c806dada25..cbff4cbe2d 100644 --- a/bsp/imxrt/libraries/drivers/SConscript +++ b/bsp/imxrt/libraries/drivers/SConscript @@ -52,6 +52,9 @@ if GetDepend('BSP_USING_USB_DEVICE'): if GetDepend('BSP_USING_USB_DEVICE'): src += Glob('usb/phy/*.c') CPPDEFINES += ['ENDIANNESS'] + +if GetDepend('BSP_USING_SDMMC'): + src += Glob('drv_usdhc.c') path = [cwd,cwd + '/config'] diff --git a/bsp/imxrt/libraries/drivers/drv_usdhc.c b/bsp/imxrt/libraries/drivers/drv_usdhc.c new file mode 100644 index 0000000000..7074b1c70b --- /dev/null +++ b/bsp/imxrt/libraries/drivers/drv_usdhc.c @@ -0,0 +1,544 @@ +#include +#ifdef BSP_USING_SDMMC + +#include "drv_usdhc.h" +#define LOG_TAG "drv.sdmmc" +#include + +SDK_ALIGN(uint8_t dma_data_buf_write[SDK_SIZEALIGN(DATA_BUFFER_SIZE, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)], + MAX(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE, USDHC_ADMA2_ADDRESS_ALIGN)); +SDK_ALIGN(uint8_t dma_data_buf_read[SDK_SIZEALIGN(DATA_BUFFER_SIZE, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)], + MAX(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE, USDHC_ADMA2_ADDRESS_ALIGN)); + +/* DMA descriptor should allocate at non-cached memory */ +AT_NONCACHEABLE_SECTION_ALIGN(uint32_t dma_table[8], 4); + +static struct rt_mmcsd_host *host; + +struct rt10xx_usdhc_des +{ + usdhc_host_t hw_host; + usdhc_handle_t hw_handle; + usdhc_adma_config_t hw_dma_config; + uint32_t hw_src_clock_hz; + usdhc_capability_t hw_capability; +}; + +struct rthw_usdhc +{ + struct rt_mmcsd_host* host; + struct rt_event event; + struct rt_mutex mutex; + struct rt10xx_usdhc_des rt10xx_des; + usdhc_transfer_t trans; +}; + +static void usdhc_init(struct rthw_usdhc *usdhc); + + +/** + * @brief This func be called in interrupt for transfer complete. + * @param base + * @param handle + * @param status + * @param userData + */ +static void trans_complete_cb(USDHC_Type *base,usdhc_handle_t *handle, + status_t status, + void *userData) +{ + struct rthw_usdhc *usdhc = (struct rthw_usdhc *)userData; + + /* wait the target status and then notify the transfer complete */ + if (status == kStatus_Success) + { + rt_event_send(&usdhc->event, IRQ_RECCOMPLETE_OK); + } + else + { + rt_event_send(&usdhc->event, IRQ_RECCOMPLETE_ERR); + } +} + + +/** + * @brief This func be called in interrupt for sdio interrupt. + * @param base + * @param userData + */ +static void sdio_interrupt_cb(USDHC_Type *base, void *userData) +{ + struct rthw_usdhc *usdhc = (struct rthw_usdhc *)userData; + sdio_irq_wakeup(usdhc->host); +} + + +/** + * @brief Transfer data. + * @param base + * @param content + * @param usdhc + * @return status_t + */ +static status_t rt10xx_usdhc_trans(struct rthw_usdhc* usdhc) +{ + status_t error = kStatus_Success; + USDHC_Type *base = usdhc->rt10xx_des.hw_host.base; + usdhc_adma_config_t *dmaconfig = &usdhc->rt10xx_des.hw_dma_config; + usdhc_transfer_t *content = &usdhc->trans; + usdhc_handle_t* handle = &usdhc->rt10xx_des.hw_handle; + + if (content->data != NULL) + { + rt_memset(dmaconfig, 0, sizeof(usdhc_adma_config_t)); + /* config adma */ + dmaconfig->dmaMode = kUSDHC_DmaModeAdma2; + dmaconfig->burstLen = kUSDHC_EnBurstLenForINCR; + dmaconfig->admaTable = dma_table; + dmaconfig->admaTableWords = 8u; + } + + int timeout=0; + while (base->PRES_STATE & kUSDHC_DataInhibitFlag) + { + if(timeout++ > RETRY_COUNTER) + { + return kStatus_Fail; + } + } + + timeout=0; + while (base->PRES_STATE & kUSDHC_CommandInhibitFlag) + { + if(timeout++ > RETRY_COUNTER) + { + return kStatus_Fail; + } + } + + timeout=0; + + /* + * When sending multiple blocks, the check status command will be sent, + * and it should not be blocked at this time + */ + if(content->command->index != 13) + { + /* Wait for the card's buffer to be not full to write to improve the write performance. */ + while ((USDHC_GetPresentStatusFlags(base) & kUSDHC_Data0LineLevelFlag) \ + != kUSDHC_Data0LineLevelFlag) + { + if(timeout++ > RETRY_COUNTER) + { + return kStatus_Fail; + } + } + } + + rt_uint32_t level = rt_hw_interrupt_disable(); + /* This function is not reentrant */ + error = USDHC_TransferNonBlocking(base, handle, dmaconfig, content); + rt_hw_interrupt_enable(level); + + rt_uint32_t event_val; + if((error != kStatus_Success) || \ + (RT_EOK!=rt_event_recv(&usdhc->event, IRQ_RECCOMPLETE_ERR|IRQ_RECCOMPLETE_OK, \ + RT_EVENT_FLAG_OR|RT_EVENT_FLAG_CLEAR, 10000, &event_val))) + { + error = kStatus_Fail; + } + if(event_val != IRQ_RECCOMPLETE_OK) + { + error = kStatus_Fail; + + /* reset usdhc */ + USDHC_Deinit(usdhc->rt10xx_des.hw_host.base); + usdhc_init(usdhc); + + event_val = 0; + } + + return error; +} + + +/** + * @brief This function config sdio. + * @param host rt_mmcsd_host + * @param io_cfg rt_mmcsd_io_cfg + * @retval None + */ +static void rthw_usdhc_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg) +{ + rt_uint32_t clk = io_cfg->clock; + struct rthw_usdhc *usdhc = host->private_data; + struct rt10xx_usdhc_des *hw_usdhc = &usdhc->rt10xx_des; + USDHC_Type *base = hw_usdhc->hw_host.base; + + if (clk > host->freq_max) + { + clk = host->freq_max; + } + + if (clk < 400*1000) + { + clk = 400*1000; + } + + LOG_D("clk:%d width:%s%s%s power:%s%s%s", + clk, + io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "", + io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "", + io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "", + io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "", + io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "", + io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : "" + ); + + RTHW_USDHC_LOCK(usdhc); + + USDHC_SetSdClock(base, hw_usdhc->hw_src_clock_hz, clk); + LOG_D("SD card Hz %d .", clk); + + if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8) + { + USDHC_SetDataBusWidth(base, kUSDHC_DataBusWidth8Bit); + } + else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4) + { + USDHC_SetDataBusWidth(base, kUSDHC_DataBusWidth4Bit); + } + else + { + USDHC_SetDataBusWidth(base, kUSDHC_DataBusWidth1Bit); + } + + switch (io_cfg->power_mode) + { + case MMCSD_POWER_OFF: + break; + case MMCSD_POWER_UP: + USDHC_SetCardActive(base, 100U); + break; + case MMCSD_POWER_ON: + break; + default: + LOG_W("Unknown power_mode %d", io_cfg->power_mode); + break; + } + + RTHW_USDHC_UNLOCK(usdhc); +} + + +usdhc_card_response_type_t type_trans(int type) +{ + switch (type) + { + case RESP_NONE: + return kCARD_ResponseTypeNone; + case RESP_R1: + return kCARD_ResponseTypeR1; + case RESP_R1B: + return kCARD_ResponseTypeR1b; + case RESP_R2: + return kCARD_ResponseTypeR2; + case RESP_R3: + return kCARD_ResponseTypeR3; + case RESP_R4: + return kCARD_ResponseTypeR4; + case RESP_R6: + return kCARD_ResponseTypeR6; + case RESP_R7: + return kCARD_ResponseTypeR7; + case RESP_R5: + return kCARD_ResponseTypeR5; + default: + return kCARD_ResponseTypeNone; + } +} + + +/** + * @brief Request callback. + * @param host + * @param req + */ +void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req) +{ + struct rthw_usdhc *usdhc = host->private_data; + struct rt_mmcsd_data *data = RT_NULL; + usdhc_transfer_t *trans = &usdhc->trans; + usdhc_command_t tran_cmd = {0}; + usdhc_data_t tran_data = {0}; + + RTHW_USDHC_LOCK(usdhc); + + trans->command = RT_NULL; + trans->data = RT_NULL; + + if (req->cmd != RT_NULL) + { + rt_memset(&tran_cmd, 0, sizeof(usdhc_command_t)); + data = req->cmd->data; + + if (data != RT_NULL) + { + rt_memset(&tran_data, 0, sizeof(usdhc_data_t)); + + tran_data.blockSize = data->blksize; + tran_data.blockCount = data->blks; + tran_data.dataType = kCARD_CommandTypeNormal; + tran_data.enableAutoCommand12 = false; + tran_data.enableAutoCommand23 = false; + tran_data.enableIgnoreError = true; + + if(data->flags == DATA_DIR_WRITE) + { + rt_memcpy(dma_data_buf_write, data->buf, (data->blks)*(data->blksize)); + tran_data.txData = (const uint32_t *)dma_data_buf_write; + tran_data.rxData = RT_NULL; + } + else if(data->flags == DATA_DIR_READ) + { + tran_data.txData = RT_NULL; + tran_data.rxData = (uint32_t *)dma_data_buf_read; + } + else + { + LOG_E("Direct of data is error."); + goto _RET; + } + trans->data = &tran_data; + } + + /*send cmd without data*/ + tran_cmd.index = req->cmd->cmd_code; + tran_cmd.argument = req->cmd->arg; + tran_cmd.responseType = type_trans(resp_type(req->cmd)); + + trans->command = &tran_cmd; + + if(rt10xx_usdhc_trans(usdhc)!=kStatus_Success) + { + req->cmd->err = 1; + goto _RET_SEND_ERROR; + } + + /* copy responds */ + if(tran_cmd.index == 9) + { + for(int i=0; i<4; i++) + { + req->cmd->resp[i] = trans->command->response[3-i]; + } + } + else + rt_memcpy(req->cmd->resp, trans->command->response, sizeof(uint32_t)*4); + + /* copy data */ + if (data!=RT_NULL && data->flags==DATA_DIR_READ) + { + rt_memcpy(data->buf, dma_data_buf_read, (data->blks)*(data->blksize)); + } + } + + if (req->stop!=RT_NULL) + { + trans->command = RT_NULL; + trans->data = RT_NULL; + rt_memset(&tran_cmd, 0, sizeof(usdhc_command_t)); + tran_cmd.index = req->stop->cmd_code; + tran_cmd.argument = req->stop->arg; + tran_cmd.responseType = type_trans(resp_type(req->cmd)); + trans->command = &tran_cmd; + if(rt10xx_usdhc_trans(usdhc)!=kStatus_Success) + { + req->stop->err = 1; + goto _RET_SEND_ERROR; + } + } + +_RET_SEND_ERROR: + mmcsd_req_complete(usdhc->host); + RTHW_USDHC_UNLOCK(usdhc); +_RET: + trans->command = RT_NULL; + trans->data = RT_NULL; + return; +} + + +/** + * @brief Detect callback + * @param host + * @return rt_int32_t + */ +rt_int32_t rthw_sd_detect(struct rt_mmcsd_host *host) +{ + return 0x01; +} + + +/** + * @brief This function update sdio interrupt. + * @param host My Param doc + * @param enable My Param doc + */ +void rthw_sdio_irq_update(struct rt_mmcsd_host *host, rt_int32_t enable) +{ + struct rthw_usdhc *usdhc = (struct rthw_usdhc *)host->private_data; + USDHC_Type *base = usdhc->rt10xx_des.hw_host.base; + if (enable) + { + LOG_D("Enable sdio irq."); + USDHC_EnableInterruptSignal(base, kUSDHC_CardInterruptFlag); + } + else + { + LOG_D("Disable sdio irq."); + USDHC_DisableInterruptSignal(base, kUSDHC_CardInterruptFlag); + } +} + + +/** + * @brief detect card, call by interrupt. + */ +static void card_insert(USDHC_Type *base, void *userData) +{ + LOG_I("Card insert!"); + mmcsd_change(host); +} + + +/** + * @brief remove card, call by interrupt. + */ +static void card_remove(USDHC_Type *base, void *userData) +{ + LOG_I("Card remove!"); +} + +static const struct rt_mmcsd_host_ops ops = +{ + rthw_sdio_request, + rthw_usdhc_iocfg, + rthw_sd_detect, + rthw_sdio_irq_update, +}; + +static const usdhc_transfer_callback_t callback = { + .TransferComplete = trans_complete_cb, + .ReTuning = RT_NULL, + .CardInserted = card_insert, + .CardRemoved = card_remove, + .SdioInterrupt = sdio_interrupt_cb, + .BlockGap = RT_NULL, +}; + +static void usdhc_init(struct rthw_usdhc *usdhc) +{ + struct rt10xx_usdhc_des *des = &usdhc->rt10xx_des; + usdhc_host_t* hw_host = &des->hw_host; + + RTHW_USDHC_LOCK(usdhc); + USDHC_Init(hw_host->base, &(hw_host->config)); + USDHC_TransferCreateHandle(hw_host->base, &des->hw_handle, &callback, usdhc); + USDHC_GetCapability(hw_host->base, &des->hw_capability); + + USDHC_CardDetectByData3(hw_host->base, 1); + USDHC_EnableInterruptStatus(hw_host->base,kUSDHC_CardInsertionFlag); + USDHC_EnableInterruptSignal(hw_host->base,kUSDHC_CardInsertionFlag); + RTHW_USDHC_UNLOCK(usdhc); +} + +struct rt_mmcsd_host *usdhc_host_create(struct rt10xx_usdhc_des *usdhc_des) +{ + struct rt_mmcsd_host *host = RT_NULL; + struct rthw_usdhc *usdhc = RT_NULL; + + if (usdhc_des == RT_NULL) + { + return RT_NULL; + } + + usdhc = rt_malloc(sizeof(struct rthw_usdhc)); + if (usdhc == RT_NULL) + { + LOG_E("L:%d F:%s malloc rthw_usdhc fail"); + return RT_NULL; + } + rt_memset(usdhc, 0, sizeof(struct rthw_usdhc)); + + host = mmcsd_alloc_host(); + if (host == RT_NULL) + { + LOG_E("L:%d F:%s mmcsd alloc host fail"); + rt_free(usdhc); + return RT_NULL; + } + + rt_event_init(&usdhc->event, "usdhc", RT_IPC_FLAG_FIFO); + rt_mutex_init(&usdhc->mutex, "usdhc", RT_IPC_FLAG_FIFO); + + rt_memcpy(&usdhc->rt10xx_des, usdhc_des, sizeof(struct rt10xx_usdhc_des)); + + usdhc_init(usdhc); + + /* set host defautl attributes */ + host->ops = &ops; + host->freq_min = SDMMC_CLOCK_400KHZ; + host->freq_max = SD_CLOCK_25MHZ; + host->valid_ocr = VDD_30_31|VDD_31_32|VDD_32_33; + host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ; + host->max_seg_size = DATA_BUFFER_SIZE; + host->max_dma_segs = 1; + host->max_blk_size = 512; + host->max_blk_count = 512; + + /* link up host and sdio */ + usdhc->host = host; + host->private_data = usdhc; + + rthw_sdio_irq_update(host, 1); + + return host; +} + +int rt_hw_sdio_init(void) +{ + struct rt10xx_usdhc_des usdhc_des = {0}; + +/* usdhc1 config start */ + UDSHC_SelectVoltage(USDHC1, 0); // 3.0v + + CLOCK_InitSysPfd(kCLOCK_Pfd0, 0x12U); + CLOCK_SetDiv(kCLOCK_Usdhc1Div, 0U); + CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1U); + + usdhc_host_t *usdhcHost = &usdhc_des.hw_host; + usdhc_des.hw_src_clock_hz = + (CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) / (CLOCK_GetDiv(kCLOCK_Usdhc1Div) + 1U)); + usdhcHost->base = USDHC1; + usdhcHost->config.dataTimeout = 0xFU; + usdhcHost->config.endianMode = kUSDHC_EndianModeLittle; + usdhcHost->config.readWatermarkLevel = 0x80U; + usdhcHost->config.writeWatermarkLevel = 0x80U; + usdhcHost->config.readBurstLen = 8U; + usdhcHost->config.writeBurstLen = 8U; + +/* usdhc1 config end */ + + host = usdhc_host_create(&usdhc_des); + if (host == RT_NULL) + { + LOG_E("Host create fail."); + return -1; + } + + return 0; +} +INIT_DEVICE_EXPORT(rt_hw_sdio_init); + +#endif diff --git a/bsp/imxrt/libraries/drivers/drv_usdhc.h b/bsp/imxrt/libraries/drivers/drv_usdhc.h new file mode 100644 index 0000000000..8691f3bee7 --- /dev/null +++ b/bsp/imxrt/libraries/drivers/drv_usdhc.h @@ -0,0 +1,27 @@ +#ifndef DRV_USDHC_H__ +#define DRV_USDHC_H__ + +#include +#include +#include +#include +#include +#include "fsl_usdhc.h" +#include "fsl_common.h" + +#define RETRY_COUNTER 1000000 + +#define IRQ_RECCOMPLETE_OK 0x00000001 +#define IRQ_RECCOMPLETE_ERR 0x00000002 + +#define SDMMC_CLOCK_400KHZ (400000U) +#define SD_CLOCK_25MHZ (25000000U) +#define SD_CLOCK_50MHZ (50000000U) + +#define RTHW_USDHC_LOCK(_usdhc) rt_mutex_take(&_usdhc->mutex, RT_WAITING_FOREVER) +#define RTHW_USDHC_UNLOCK(_usdhc) rt_mutex_release(&_usdhc->mutex); + +#define DATA_BLOCK_COUNT (32U) +#define DATA_BUFFER_SIZE (512U * DATA_BLOCK_COUNT) + +#endif -- Gitee From 3145a47b7d1fa7c5fd2e44bd9c0f7424df669fc8 Mon Sep 17 00:00:00 2001 From: vito <7718858+vitochl@user.noreply.gitee.com> Date: Thu, 13 Aug 2020 22:18:47 +0800 Subject: [PATCH 2/4] rt1052 fire pro add the support of sdio --- .../board/MCUX_Config/MCUX_Config.mex | 219 +++++++++++++----- .../board/MCUX_Config/pin_mux.c | 106 +++++++-- .../board/MCUX_Config/pin_mux.h | 32 +++ 3 files changed, 285 insertions(+), 72 deletions(-) diff --git a/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/MCUX_Config.mex b/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/MCUX_Config.mex index 5b8653181e..cac6c23895 100644 --- a/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/MCUX_Config.mex +++ b/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/MCUX_Config.mex @@ -1,5 +1,5 @@ - + MIMXRT1052xxxxB MIMXRT1052DVL6B @@ -14,11 +14,16 @@ false false + false - + + + + + - 5.0.2 + 7.0.1 @@ -66,6 +71,11 @@ true + + + true + + true @@ -101,13 +111,79 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + + + + + - 5.0.2 + 7.0.1 @@ -154,14 +230,18 @@ OUTPUT - + + + true + + + true - @@ -244,129 +324,118 @@ - + + + + N/A + + + + - + true - + - 2.2.4 + 2.1.5 - + true - + - 2.1.5 + 2.2.4 + + + + - 5.0.2 + 7.0.1 - + 0 - - + + true - - + + true - + 0 - - + + true - - + + true - + 0 - + true - + true - + 0 - + true - + true - - - - - - - - - - - - - - - - - - - - - - - - + + @@ -406,7 +475,7 @@ - + @@ -429,7 +498,30 @@ - + + + + + + + + + + + + + + + + + + + + + + + + @@ -456,11 +548,22 @@ - + + + + + + + + N/A + + + + diff --git a/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.c b/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.c index a837d6f11e..dda5a4ca39 100644 --- a/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.c +++ b/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.c @@ -6,11 +6,11 @@ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo -product: Pins v5.0 +product: Pins v7.0 processor: MIMXRT1052xxxxB package_id: MIMXRT1052DVL6B mcu_data: ksdk2_0 -processor_version: 5.0.2 +processor_version: 7.0.1 board: IMXRT1050-EVKB pin_labels: - {pin_num: G11, pin_signal: GPIO_AD_B0_03, label: BSP_BEEP} @@ -53,6 +53,19 @@ BOARD_InitPins: - {pin_num: G11, peripheral: GPIO1, signal: 'gpio_io, 03', pin_signal: GPIO_AD_B0_03} - {pin_num: J13, peripheral: GPIO1, signal: 'gpio_io, 27', pin_signal: GPIO_AD_B1_11} - {pin_num: K12, peripheral: GPIO1, signal: 'gpio_io, 21', pin_signal: GPIO_AD_B1_05} + - {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, + pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, drive_strength: R0, slew_rate: Fast} + - {pin_num: K1, peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_03, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, pull_keeper_select: Pull, + drive_strength: R0, slew_rate: Fast} + - {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, pull_keeper_select: Pull, + drive_strength: R0, slew_rate: Fast} + - {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05, hysteresis_enable: Enable, pull_up_down_config: Pull_Down_100K_Ohm, pull_keeper_select: Pull, + drive_strength: R0, slew_rate: Fast} + - {pin_num: J4, peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_00, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, pull_keeper_select: Pull, + drive_strength: R0, slew_rate: Fast} + - {pin_num: C14, peripheral: USDHC1, signal: usdhc_vselect, pin_signal: GPIO_B1_14, pull_keeper_enable: Disable, drive_strength: R0} + - {pin_num: J3, peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_01, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, drive_strength: R0, + slew_rate: Fast} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ @@ -111,31 +124,96 @@ void BOARD_InitPins(void) { IOMUXC_GPIO_B1_13_LPUART5_RX, /* GPIO_B1_13 is configured as LPUART5_RX */ 0U); /* Software Input On Field: Input Path is determined by functionality */ IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, /* GPIO_AD_B0_14 is configured as FLEXCAN2_TX */ - 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B0_14 */ + IOMUXC_GPIO_B1_14_USDHC1_VSELECT, /* GPIO_B1_14 is configured as USDHC1_VSELECT */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, /* GPIO_SD_B0_00 is configured as USDHC1_CMD */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, /* GPIO_SD_B0_01 is configured as USDHC1_CLK */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, /* GPIO_SD_B0_02 is configured as USDHC1_DATA0 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, /* GPIO_SD_B0_03 is configured as USDHC1_DATA1 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, /* GPIO_AD_B0_15 is configured as FLEXCAN2_RX */ - 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B0_15 */ + IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, /* GPIO_SD_B0_04 is configured as USDHC1_DATA2 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, /* GPIO_SD_B0_05 is configured as USDHC1_DATA3 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, /* GPIO_AD_B0_14 PAD functional properties : */ - 0x10B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 + IOMUXC_GPIO_B1_14_USDHC1_VSELECT, /* GPIO_B1_14 PAD functional properties : */ + 0x88U); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) Speed Field: medium(100MHz) Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Enable Field: Pull/Keeper Disabled Pull / Keep Select Field: Keeper Pull Up / Down Config. Field: 100K Ohm Pull Down Hyst. Enable Field: Hysteresis Disabled */ IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, /* GPIO_AD_B0_15 PAD functional properties : */ - 0x10B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 + IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, /* GPIO_SD_B0_00 PAD functional properties : */ + 0x017089U); /* Slew Rate Field: Fast Slew Rate + Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 47K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, /* GPIO_SD_B0_01 PAD functional properties : */ + 0x015089U); /* Slew Rate Field: Fast Slew Rate + Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) Speed Field: medium(100MHz) Open Drain Enable Field: Open Drain Disabled Pull / Keep Enable Field: Pull/Keeper Enabled Pull / Keep Select Field: Keeper + Pull Up / Down Config. Field: 47K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, /* GPIO_SD_B0_02 PAD functional properties : */ + 0x017089U); /* Slew Rate Field: Fast Slew Rate + Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 47K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, /* GPIO_SD_B0_03 PAD functional properties : */ + 0x017089U); /* Slew Rate Field: Fast Slew Rate + Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 47K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, /* GPIO_SD_B0_04 PAD functional properties : */ + 0x017089U); /* Slew Rate Field: Fast Slew Rate + Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 47K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, /* GPIO_SD_B0_05 PAD functional properties : */ + 0x013089U); /* Slew Rate Field: Fast Slew Rate + Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Disabled */ + Hyst. Enable Field: Hysteresis Enabled */ } /*********************************************************************************************************************** diff --git a/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.h b/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.h index 64dc93b63a..5382f8b4dc 100644 --- a/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.h +++ b/bsp/imxrt/imxrt1052-fire-pro/board/MCUX_Config/pin_mux.h @@ -91,6 +91,38 @@ void BOARD_InitBootPins(void); #define BOARD_INITPINS_CSI_MCLK_PORT GPIO1 /*!< PORT device name: GPIO1 */ #define BOARD_INITPINS_CSI_MCLK_PIN 21U /*!< GPIO1 pin index: 21 */ +/* GPIO_SD_B0_02 (coord J1), SD1_D0/J24[4]/SPI_MOSI/PWM */ +#define BOARD_INITPINS_SD1_D0_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ +#define BOARD_INITPINS_SD1_D0_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ +#define BOARD_INITPINS_SD1_D0_CHANNEL 0U /*!< USDHC1 usdhc_data channel: 0 */ + +/* GPIO_SD_B0_03 (coord K1), SD1_D1/J24[5]/SPI_MISO */ +#define BOARD_INITPINS_SD1_D1_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ +#define BOARD_INITPINS_SD1_D1_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ +#define BOARD_INITPINS_SD1_D1_CHANNEL 1U /*!< USDHC1 usdhc_data channel: 1 */ + +/* GPIO_SD_B0_04 (coord H2), SD1_D2 */ +#define BOARD_INITPINS_SD1_D2_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ +#define BOARD_INITPINS_SD1_D2_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ +#define BOARD_INITPINS_SD1_D2_CHANNEL 2U /*!< USDHC1 usdhc_data channel: 2 */ + +/* GPIO_SD_B0_05 (coord J2), SD1_D3 */ +#define BOARD_INITPINS_SD1_D3_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ +#define BOARD_INITPINS_SD1_D3_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ +#define BOARD_INITPINS_SD1_D3_CHANNEL 3U /*!< USDHC1 usdhc_data channel: 3 */ + +/* GPIO_SD_B0_00 (coord J4), SD1_CMD/J24[6] */ +#define BOARD_INITPINS_SD1_CMD_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ +#define BOARD_INITPINS_SD1_CMD_SIGNAL usdhc_cmd /*!< USDHC1 signal: usdhc_cmd */ + +/* GPIO_B1_14 (coord C14), SD0_VSELECT */ +#define BOARD_INITPINS_SD0_VSELECT_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ +#define BOARD_INITPINS_SD0_VSELECT_SIGNAL usdhc_vselect /*!< USDHC1 signal: usdhc_vselect */ + +/* GPIO_SD_B0_01 (coord J3), SD1_CLK/J24[3] */ +#define BOARD_INITPINS_SD1_CLK_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ +#define BOARD_INITPINS_SD1_CLK_SIGNAL usdhc_clk /*!< USDHC1 signal: usdhc_clk */ + /*! * @brief Configures pin routing and optionally pin electrical features. -- Gitee From 65aed81abf3d927f0b37d9250d83041146d452dd Mon Sep 17 00:00:00 2001 From: vito <7718858+vitochl@user.noreply.gitee.com> Date: Thu, 13 Aug 2020 22:27:34 +0800 Subject: [PATCH 3/4] fix Kconfig to support sdmmc --- bsp/imxrt/imxrt1052-fire-pro/board/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/bsp/imxrt/imxrt1052-fire-pro/board/Kconfig b/bsp/imxrt/imxrt1052-fire-pro/board/Kconfig index 5ab63d35a9..69094becc1 100644 --- a/bsp/imxrt/imxrt1052-fire-pro/board/Kconfig +++ b/bsp/imxrt/imxrt1052-fire-pro/board/Kconfig @@ -158,6 +158,11 @@ menu "On-chip Peripheral Drivers" bool "Enable RTC" select RT_USING_RTC default n + + config BSP_USING_SDMMC + bool "Enable SDMMC" + select RT_USING_SDIO + default n endmenu -- Gitee From b8f143d9baf8e82041dd7a17c7368dd92a656d13 Mon Sep 17 00:00:00 2001 From: vito <7718858+vitochl@user.noreply.gitee.com> Date: Thu, 13 Aug 2020 22:28:46 +0800 Subject: [PATCH 4/4] fix sConscript --- bsp/imxrt/libraries/MIMXRT1050/SConscript | 3 --- 1 file changed, 3 deletions(-) diff --git a/bsp/imxrt/libraries/MIMXRT1050/SConscript b/bsp/imxrt/libraries/MIMXRT1050/SConscript index bdd85ae499..58baffd8f1 100644 --- a/bsp/imxrt/libraries/MIMXRT1050/SConscript +++ b/bsp/imxrt/libraries/MIMXRT1050/SConscript @@ -61,9 +61,6 @@ if GetDepend(['BSP_USING_CAN']): if GetDepend(['BSP_USING_ETH']): src += ['MIMXRT1052/drivers/fsl_enet.c'] -if GetDepend(['RT_USING_SDIO']): - src += ['MIMXRT1052/drivers/'] - if GetDepend(['RT_USING_AUDIO']): src += ['MIMXRT1052/drivers/fsl_sai.c'] -- Gitee